1. Field of the Invention
The present invention relates to the non-volatile memory field. More specifically, the present invention relates to the erasing of a flash memory device With NAND architecture.
2. Description of the Related Art
The flash memory devices are non-volatile memories wherein each single cell may be programmed electrically, but a large number of cells, forming a sector, are erased at the same time. Typically, the cells consist of floating gate MOS transistors which store a logic value defined by their threshold voltage (which depends on the electric charge stored on the floating gate). Particularly, in a flash memory with NAND architecture, the cells are grouped in strings, each one consisting of a set of cells that are connected in series. The main advantage of such architecture is the reduced area occupation, essentially due to both the reduction of the contacts number and the reduced size of each cell. This makes the NAND memories particularly advantageous in a number of applications such as memory cards, memories of digital video-cameras and of audio recorders.
In order to maintain reduced sizes, the NAND memories implement a decoding system that is able to apply positive voltages only (i.e., greater or equal to zero) to the various cells selectively. Moreover, the cells are generally erased by applying a single blind erasing pulse (which reduces the threshold voltages of the cells below a reference reading voltage).
A problem of the NAND memories is due to the capacitive coupling between the floating gates of adjacent cells; such effect makes the threshold voltage of a cell dependent non-uniquely on the electric charge stored in its floating gate but even on the electric charges stored in the floating gates of the adjacent cells. The problem is particularly acute in the NAND memories because of their high integration. Such effect modifies the threshold voltages of the cells whenever the adjacent cells are programmed. The suffered variation increases with the amplitude of the gap of the threshold voltages of the adjacent cells (for example, for a gap of 2.5V the variation of the threshold voltage is equal to about 130 mV, while for a gap of 7V the variation of the threshold voltage is equal to about 360 mV). Thus, the problem is particularly acute when the adjacent cells that are programmed start from a very low original threshold voltage. Such effect is emphasized by the single pulse erasing procedure; in fact, the erasing pulse has to be dimensioned in order to guarantee the erasing in the worst conditions, so that it normally brings the threshold voltages of the erased cells to very low values. The above described variation of the threshold voltages can cause reading errors. Such effect is experienced in the standard NAND memories but it is more and more limiting in the multi-level NAND memories wherein each cell stores multiple bits (since the margins which are used for discriminating the different stored logic values are reduced).
In order to limit the capacitive coupling effect, a sequential programming method of the pages into which the memory is logically divided is often adopted; in such case, the pages have to be programmed in succession according to their physical order. This operative way removes the capacitive coupling effect due to the preceding pages. In fact, the preceding pages cannot change the threshold voltages of the cells of the current page because they are not modified any longer after their programming. However, such technique does not remove the capacitive coupling effects of the other cells which are programmed successively.
The patent U.S. Pat. No. 6,661,711 B2 discloses a method for shifting the distribution of the threshold voltages of the erased cells. In such case, the cells are programmed until their threshold voltage does not exceed a predetermined value. Such operation is indiscriminately performed over all the cells, with the exception of some cells (in the example at issue, eight), which the threshold voltage exceeds an acceptable maximum value. In such a way, a shifting of the distribution of the threshold voltages is obtained. Nevertheless, the proposed solution substantially maintains the same shape of the distribution, which generally has a rather long tail due to the cells having a threshold voltage more negative.